From d76fc9f6fda32480b725bd9d5263a93c6ba42c7b Mon Sep 17 00:00:00 2001 From: Lina Iyer Date: Fri, 27 Mar 2015 15:03:42 -0600 Subject: [PATCH 05/78] cpuidle: qcom-spm: Add 8916 SPM register data Add SPM register information and initialization values for QCOM 8916 SoC. Signed-off-by: Lina Iyer (cherry picked from commit 3487bc535e79f1f7cb30d5c6050c4623c3cda695) --- .../devicetree/bindings/arm/msm/qcom,saw2.txt | 1 + drivers/cpuidle/cpuidle-qcom-spm.c | 28 ++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt index ae4afc6dc..986a8eabd 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt @@ -27,6 +27,7 @@ PROPERTIES "qcom,apq8064-saw2-v1.1-cpu" "qcom,msm8974-saw2-v2.1-cpu" "qcom,apq8084-saw2-v2.1-cpu" + "qcom,msm8916-saw2-v3.0-cpu" - reg: Usage: required diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c index bf3c70d64..da1826ceb 100644 --- a/drivers/cpuidle/cpuidle-qcom-spm.c +++ b/drivers/cpuidle/cpuidle-qcom-spm.c @@ -56,6 +56,7 @@ struct spm_reg_data { const u32 *reg_offset; u32 spm_cfg; u32 spm_dly; + u32 spm_ctl; u32 pmic_dly; u32 pmic_data[MAX_PMIC_DATA]; u8 seq[MAX_SEQ_DATA]; @@ -109,6 +110,28 @@ static const struct spm_reg_data spm_reg_8064_cpu = { .start_index[PM_SLEEP_MODE_SPC] = 2, }; +static const u32 spm_reg_offset_v3_0[SPM_REG_NR] = { + [SPM_REG_CFG] = 0x08, + [SPM_REG_SPM_CTL] = 0x30, + [SPM_REG_DLY] = 0x34, + [SPM_REG_PMIC_DATA_0] = 0x40, + [SPM_REG_PMIC_DATA_1] = 0x44, + [SPM_REG_SEQ_ENTRY] = 0x400, +}; + +/* SPM register data for 8916 */ +static const struct spm_reg_data spm_reg_8916_cpu = { + .reg_offset = spm_reg_offset_v3_0, + .spm_cfg = 0x1, + .spm_ctl = 0xE, + .spm_dly = 0x3C102800, + .seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90, + 0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B, + 0x80, 0x10, 0x26, 0x30, 0x0F }, + .start_index[PM_SLEEP_MODE_STBY] = 0, + .start_index[PM_SLEEP_MODE_SPC] = 5, +}; + static inline void spm_register_write(struct spm_driver_data *drv, enum spm_reg reg, u32 val) { @@ -265,6 +288,8 @@ static const struct of_device_id spm_match_table[] = { .data = &spm_reg_8974_8084_cpu }, { .compatible = "qcom,apq8064-saw2-v1.1-cpu", .data = &spm_reg_8064_cpu }, + { .compatible = "qcom,msm8916-saw2-v3.0-cpu", + .data = &spm_reg_8916_cpu }, { }, }; @@ -317,7 +342,8 @@ static int spm_dev_probe(struct platform_device *pdev) drv->reg_data->pmic_data[0]); spm_register_write(drv, SPM_REG_PMIC_DATA_1, drv->reg_data->pmic_data[1]); - + spm_register_write(drv, SPM_REG_SPM_CTL, + drv->reg_data->spm_ctl); /* Set up Standby as the default low power mode */ spm_set_low_power_mode(drv, PM_SLEEP_MODE_STBY); -- 2.31.1