From ce963a191e9a3ef989c1e7673f3a2a1ee6b57476 Mon Sep 17 00:00:00 2001 From: mtk27745 Date: Tue, 23 May 2023 12:06:29 +0800 Subject: [PATCH 2010/2010] wifi: mt76: add SER support for wed3.0 Change-Id: I2711b9dc336fca9a1ae32a8fbf27810a7e27b1e3 --- dma.c | 9 ++++++--- mt7996/dma.c | 54 +++++++++++++++++++++++++++++++++++++++++++++------ mt7996/mac.c | 49 +++++++++++++++++++++++++++++++++++++++++++++- mt7996/mmio.c | 47 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 149 insertions(+), 10 deletions(-) diff --git a/dma.c b/dma.c index 7d656a5..fff013a 100644 --- a/dma.c +++ b/dma.c @@ -876,8 +876,9 @@ int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) q->head = q->ndesc - 1; q->queued = q->ndesc - 1; } + q->flags = flags; } else { - ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs, 0); + ret = mtk_wed_device_rx_ring_setup(wed, ring, q->regs, reset); if (!ret) q->wed_regs = wed->rx_ring[ring].reg_base; } @@ -1008,7 +1009,9 @@ done: /* reset WED rx queues */ mt76_dma_wed_setup(dev, q, true); - if (q->flags != MT_WED_Q_TXFREE) { + if (q->flags != MT_WED_Q_TXFREE && + !((q->flags & MT_QFLAG_RRO) && + mtk_wed_device_active(&dev->mmio.wed))) { mt76_dma_sync_idx(dev, q); mt76_dma_rx_fill(dev, q); } @@ -1246,7 +1249,7 @@ void mt76_dma_cleanup(struct mt76_dev *dev) struct mt76_queue *q = &dev->q_rx[i]; if (mtk_wed_device_active(&dev->mmio.wed) && q->ndesc && - (mt76_queue_is_rro_msdu_pg(q) || mt76_queue_is_rro_data(q))) + (q->flags & MT_QFLAG_RRO)) continue; netif_napi_del(&dev->napi[i]); diff --git a/mt7996/dma.c b/mt7996/dma.c index bafc7f1..8fcab84 100644 --- a/mt7996/dma.c +++ b/mt7996/dma.c @@ -393,7 +393,6 @@ int mt7996_dma_rro_init(struct mt7996_dev *dev) mt76_queue_rx_init(dev, MT_RXQ_TXFREE_BAND0, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_TXFREE_BAND2, mt76_dma_rx_poll); - mt76_queue_rx_init(dev, MT_RXQ_RRO_IND, mt76_dma_rx_poll); if (mtk_wed_device_active(wed)) { u32 wed_irq_mask = dev->mt76.mmio.irqmask | @@ -405,12 +404,13 @@ int mt7996_dma_rro_init(struct mt7996_dev *dev) mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask); - mtk_wed_device_start_hwrro(wed, wed_irq_mask); + mtk_wed_device_start_hwrro(wed, wed_irq_mask, false); mt7996_irq_enable(dev, wed_irq_mask); } else { mt76_queue_rx_init(dev, MT_RXQ_RRO_BAND0, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_RRO_BAND1, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_RRO_BAND2, mt76_dma_rx_poll); + mt76_queue_rx_init(dev, MT_RXQ_RRO_IND, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_MSDU_PAGE_BAND0, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_MSDU_PAGE_BAND1, mt76_dma_rx_poll); mt76_queue_rx_init(dev, MT_RXQ_MSDU_PAGE_BAND2, mt76_dma_rx_poll); @@ -516,6 +516,12 @@ int mt7996_dma_init(struct mt7996_dev *dev) if (mt7996_band_valid(dev, MT_BAND2)) { /* rx data queue for band2 */ rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND2) + hif1_ofs; + if (mtk_wed_device_active(wed)) { + rx_base = MT_RXQ_RING_BASE(MT_RXQ_BAND2); + if (mtk_wed_get_rx_capa(wed)) + dev->mt76.q_rx[MT_RXQ_BAND2].flags = MT_WED_Q_RX(1); + } + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND2], MT_RXQ_ID(MT_RXQ_BAND2), MT7996_RX_RING_SIZE, @@ -605,11 +611,35 @@ int mt7996_dma_init(struct mt7996_dev *dev) return 0; } +static void mt7996_dma_wed_reset(struct mt7996_dev *dev) +{ + struct mt76_dev *mdev = &dev->mt76; + + if (!test_bit(MT76_STATE_WED_RESET, &dev->mphy.state)) + return; + + complete(&mdev->mmio.wed_reset); + + if (!wait_for_completion_timeout(&dev->mt76.mmio.wed_reset_complete, + 3 * HZ)) + dev_err(dev->mt76.dev, "wed reset complete timeout\n"); +} + +static void +mt7996_dma_reset_tx_queue(struct mt7996_dev *dev, struct mt76_queue *q) +{ + mt76_queue_reset(dev, q, false); + if (mtk_wed_device_active(&dev->mt76.mmio.wed)) + mt76_dma_wed_setup(&dev->mt76, q, true); +} + void mt7996_dma_reset(struct mt7996_dev *dev, bool force) { struct mt76_phy *phy2 = dev->mt76.phys[MT_BAND1]; struct mt76_phy *phy3 = dev->mt76.phys[MT_BAND2]; u32 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); + struct mtk_wed_device *wed = &dev->mt76.mmio.wed; + struct mtk_wed_device *wed_ext = &dev->mt76.mmio.wed_ext; int i; mt76_clear(dev, MT_WFDMA0_GLO_CFG, @@ -637,7 +667,7 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) mt76_for_each_q_rx(&dev->mt76, i) mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); - if (dev->rro_support) { + if (dev->rro_support && !mtk_wed_device_active(wed)) { mt7996_rro_msdu_pg_free(dev); mt7996_rx_token_put(dev); } @@ -648,21 +678,33 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) if (force) mt7996_wfsys_reset(dev); + if (dev->hif2 && mtk_wed_device_active(wed_ext)) + mtk_wed_device_dma_reset(wed_ext); + + if (mtk_wed_device_active(wed)) + mtk_wed_device_dma_reset(wed); + mt7996_dma_disable(dev, force); + mt7996_dma_wed_reset(dev); /* reset hw queues */ for (i = 0; i < __MT_TXQ_MAX; i++) { - mt76_queue_reset(dev, dev->mphy.q_tx[i], false); + mt7996_dma_reset_tx_queue(dev, dev->mphy.q_tx[i]); if (phy2) - mt76_queue_reset(dev, phy2->q_tx[i], false); + mt7996_dma_reset_tx_queue(dev, phy2->q_tx[i]); if (phy3) - mt76_queue_reset(dev, phy3->q_tx[i], false); + mt7996_dma_reset_tx_queue(dev, phy3->q_tx[i]); } for (i = 0; i < __MT_MCUQ_MAX; i++) mt76_queue_reset(dev, dev->mt76.q_mcu[i], false); mt76_for_each_q_rx(&dev->mt76, i) { + if (mtk_wed_device_active(wed) && + ((dev->mt76.q_rx[i].flags & MT_QFLAG_RRO) || + dev->mt76.q_rx[i].flags == MT_WED_Q_TXFREE)) + continue; + mt76_queue_reset(dev, &dev->mt76.q_rx[i], false); } diff --git a/mt7996/mac.c b/mt7996/mac.c index 4904e88..4706cb6 100644 --- a/mt7996/mac.c +++ b/mt7996/mac.c @@ -2517,6 +2517,10 @@ mt7996_mac_restart(struct mt7996_dev *dev) /* disable all tx/rx napi */ mt76_worker_disable(&dev->mt76.tx_worker); mt76_for_each_q_rx(mdev, i) { + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && + (mdev->q_rx[i].flags & MT_QFLAG_RRO)) + continue; + if (mdev->q_rx[i].ndesc) napi_disable(&dev->mt76.napi[i]); } @@ -2530,6 +2534,10 @@ mt7996_mac_restart(struct mt7996_dev *dev) local_bh_disable(); mt76_for_each_q_rx(mdev, i) { + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && + (mdev->q_rx[i].flags & MT_QFLAG_RRO)) + continue; + if (mdev->q_rx[i].ndesc) { napi_enable(&dev->mt76.napi[i]); napi_schedule(&dev->mt76.napi[i]); @@ -2704,6 +2712,13 @@ void mt7996_mac_reset_work(struct work_struct *work) dev_info(dev->mt76.dev,"\n%s L1 SER recovery start.", wiphy_name(dev->mt76.hw->wiphy)); + + if (mtk_wed_device_active(&dev->mt76.mmio.wed_ext)) + mtk_wed_device_stop(&dev->mt76.mmio.wed_ext); + + if (mtk_wed_device_active(&dev->mt76.mmio.wed)) + mtk_wed_device_stop(&dev->mt76.mmio.wed); + ieee80211_stop_queues(mt76_hw(dev)); if (phy2) ieee80211_stop_queues(phy2->mt76->hw); @@ -2727,8 +2742,13 @@ void mt7996_mac_reset_work(struct work_struct *work) cancel_delayed_work_sync(&phy3->mt76->mac_work); } mt76_worker_disable(&dev->mt76.tx_worker); - mt76_for_each_q_rx(&dev->mt76, i) + mt76_for_each_q_rx(&dev->mt76, i) { + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && + (dev->mt76.q_rx[i].flags & MT_QFLAG_RRO)) + continue; + napi_disable(&dev->mt76.napi[i]); + } napi_disable(&dev->mt76.tx_napi); mutex_lock(&dev->mt76.mutex); @@ -2751,6 +2771,29 @@ void mt7996_mac_reset_work(struct work_struct *work) /* enable dma tx/rx and interrupt */ __mt7996_dma_enable(dev, false, false); + + if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { + u32 wed_irq_mask = dev->mt76.mmio.irqmask | + MT_INT_RRO_RX_DONE | + MT_INT_TX_DONE_BAND2; + + if (mtk_wed_get_rx_capa(&dev->mt76.mmio.wed)) + wed_irq_mask &= ~MT_INT_RX_DONE_RRO_IND; + + mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask); + + mtk_wed_device_start_hwrro(&dev->mt76.mmio.wed, wed_irq_mask, true); + mt7996_irq_enable(dev, wed_irq_mask); + mt7996_irq_disable(dev, 0); + } + + if (mtk_wed_device_active(&dev->mt76.mmio.wed_ext)) { + mt76_wr(dev, MT_INT1_MASK_CSR, + dev->mt76.mmio.irqmask | MT_INT_TX_DONE_BAND2); + mtk_wed_device_start(&dev->mt76.mmio.wed_ext, + dev->mt76.mmio.irqmask | MT_INT_TX_DONE_BAND2); + } + clear_bit(MT76_MCU_RESET, &dev->mphy.state); clear_bit(MT76_RESET, &dev->mphy.state); if (phy2) @@ -2760,6 +2803,10 @@ void mt7996_mac_reset_work(struct work_struct *work) local_bh_disable(); mt76_for_each_q_rx(&dev->mt76, i) { + if (mtk_wed_device_active(&dev->mt76.mmio.wed) && + ((dev->mt76.q_rx[i].flags & MT_QFLAG_RRO))) + continue; + napi_enable(&dev->mt76.napi[i]); napi_schedule(&dev->mt76.napi[i]); } diff --git a/mt7996/mmio.c b/mt7996/mmio.c index 2361e1b..8dfd694 100644 --- a/mt7996/mmio.c +++ b/mt7996/mmio.c @@ -6,9 +6,11 @@ #include #include #include +#include #include "mt7996.h" #include "mac.h" +#include "mcu.h" #include "../trace.h" #include "../dma.h" @@ -297,6 +299,43 @@ unmap: mt7996_mmio_wed_release_rx_buf(wed); return -ENOMEM; } + +static int mt7996_mmio_wed_reset(struct mtk_wed_device *wed) +{ + struct mt76_dev *mdev = container_of(wed, struct mt76_dev, mmio.wed); + struct mt7996_dev *dev = container_of(mdev, struct mt7996_dev, mt76); + struct mt76_phy *mphy = &dev->mphy; + int ret; + + ASSERT_RTNL(); + + if (test_and_set_bit(MT76_STATE_WED_RESET, &mphy->state)) + return -EBUSY; + + ret = mt7996_mcu_set_ser(dev, UNI_CMD_SER_TRIGGER, UNI_CMD_SER_SET_RECOVER_L1, + mphy->band_idx); + if (ret) + goto out; + + rtnl_unlock(); + if (!wait_for_completion_timeout(&mdev->mmio.wed_reset, 20 * HZ)) { + dev_err(mdev->dev, "wed reset timeout\n"); + ret = -ETIMEDOUT; + } + rtnl_lock(); +out: + clear_bit(MT76_STATE_WED_RESET, &mphy->state); + + return ret; +} + +static void mt7996_mmio_wed_reset_complete(struct mtk_wed_device *wed) +{ + struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); + + complete(&dev->mmio.wed_reset_complete); +} + #endif int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, @@ -421,6 +460,14 @@ int mt7996_mmio_wed_init(struct mt7996_dev *dev, void *pdev_ptr, wed->wlan.init_rx_buf = mt7996_mmio_wed_init_rx_buf; wed->wlan.release_rx_buf = mt7996_mmio_wed_release_rx_buf; wed->wlan.update_wo_rx_stats = NULL; + if (hif2) { + wed->wlan.reset = NULL; + wed->wlan.reset_complete = NULL; + } else { + wed->wlan.reset = mt7996_mmio_wed_reset; + wed->wlan.reset_complete = mt7996_mmio_wed_reset_complete; + } + if (mtk_wed_device_attach(wed)) return 0; -- 2.18.0